Intel Atom PSE, configuration parameters
Intel Atom PSE, configuration parameters
Hello, i am working on intel x6000 atom target
trying to work with PSE-I2C0, when i see RDS - 614110, 6.2.1 IC_CON register details it lists lot of configuration parameters like I2C_DYNAMIC_TAR_UPDATE, how are these parameters set
thanks
Ravi
trying to work with PSE-I2C0, when i see RDS - 614110, 6.2.1 IC_CON register details it lists lot of configuration parameters like I2C_DYNAMIC_TAR_UPDATE, how are these parameters set
thanks
Ravi
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Re: Intel Atom PSE, configuration parameters
Those configuration parameters are part of Synopsys's DesignWare I2C controller IP core. As far as I can tell, Intel would have permanently set them when integrating the IP core into the PCH silicon.
It's interesting that the SIO I2C controllers seem to be based on the same IP core, but the datasheet makes no mention of configuration parameters there. Did the writers get lazy when they got to the PSE I2C controllers, or are those parameters not actually permanent?
You'll have to contact Intel for a better datasheet.
It's interesting that the SIO I2C controllers seem to be based on the same IP core, but the datasheet makes no mention of configuration parameters there. Did the writers get lazy when they got to the PSE I2C controllers, or are those parameters not actually permanent?
You'll have to contact Intel for a better datasheet.
Re: Intel Atom PSE, configuration parameters
hello Octocontrabass
i tried to find the register to generate start and stop I2C condition but could not find, usually in controllers i use to find them as part of control registers.
Thanks
Ravi
i tried to find the register to generate start and stop I2C condition but could not find, usually in controllers i use to find them as part of control registers.
Thanks
Ravi
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Re: Intel Atom PSE, configuration parameters
You're looking for IC_DATA_CMD.
Re: Intel Atom PSE, configuration parameters
hello Octocontrabass
i thought that was for restarting
i thought IC_TAR was the right one but it says to write this register I2C must be disabled that is confused me
thanks
Ravi
i thought that was for restarting
i thought IC_TAR was the right one but it says to write this register I2C must be disabled that is confused me
thanks
Ravi
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Re: Intel Atom PSE, configuration parameters
The I2C controller automatically generates a start condition when you try to send or receive data.
The I2C controller generates a stop condition when you set bit 9 of IC_DATA_CMD.
The I2C controller generates a stop condition when you set bit 9 of IC_DATA_CMD.
Re: Intel Atom PSE, configuration parameters
hello Octocontrabass,
Thanks for the clarification, i thought i have to do it manually as read with other controllers
Ravi
Thanks for the clarification, i thought i have to do it manually as read with other controllers
Ravi
Re: Intel Atom PSE, configuration parameters
hello Octocontrabass,
As of now i do not have an i2c device to connect (on the way), i am aware that this protocol needs hand shake,
i wanted to see at-least first 8 clock pulses coming out,
but i am not seeing any clock on the scope, but i was able to see the start condition and that it (SDA going low when CLK is high)
is not possible to see the translation with out connecting slave at all?
--Additional information about the setup
i had switched to PCH i2c device RDS - 614109 chapter 14
i have target address register set to 0x99
control register set to 0x23 master mode, standard speed, restart enable
SS high count register = SS Low COunt Regiser =8
I2C is Enabled
and IC_DATA_CMD set with some data to send
As of now i do not have an i2c device to connect (on the way), i am aware that this protocol needs hand shake,
i wanted to see at-least first 8 clock pulses coming out,
but i am not seeing any clock on the scope, but i was able to see the start condition and that it (SDA going low when CLK is high)
is not possible to see the translation with out connecting slave at all?
--Additional information about the setup
i had switched to PCH i2c device RDS - 614109 chapter 14
i have target address register set to 0x99
control register set to 0x23 master mode, standard speed, restart enable
SS high count register = SS Low COunt Regiser =8
I2C is Enabled
and IC_DATA_CMD set with some data to send
-
- Member
- Posts: 5568
- Joined: Mon Mar 25, 2013 7:01 pm
Re: Intel Atom PSE, configuration parameters
If you set bit 0 of the control register, you must also set bit 6. Try using 0x63 instead of 0x23.ravi wrote:control register set to 0x23 master mode, standard speed, restart enable
Re: Intel Atom PSE, configuration parameters
no luck ,same thing pulled up clock line never goes down
Thanks
Ravi
Thanks
Ravi
Re: Intel Atom PSE, configuration parameters
My mistake, High and low count are too low , corrected it 650/650, now can see the clock
Thanks
Ravi
Thanks
Ravi