Wrote a tutorial covering long mode

[StephanvanSchaik]

Addendum: I updated the wiki article.

Hi there, few question about tutorial here

I read your reply twice and I didn't find any actual questions, perhaps suggestions or corrections, but no actual questions.

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    mov di, 0x1000
    xor ax, ax
    mov cx, 16384
    rep stosb  ; Clear the memory.

After this part di points to 4096+16384, so we need to set it one more time: mov di, 0x1000

The way I actually do it is:

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    mov di, 0x1000
    mov cr3, di
    xor ax, ax
    mov cx, 16384
    rep stosb
    mov edi, cr3

And in 32-bit:

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    mov edi, 0x1000
    mov cr3, edi
    xor eax, eax
    mov ecx, 4096
    rep stosd
    mov edi, cr3

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    ; Set the word at the destination index to 0x2003.
    mov WORD [di], 0x2003
     ; Add 0x1000 to the destination index.
    add di, 0x1000
     ; Set the word at the destination index to 0x3003.
    mov WORD [di], 0x3003
     ; Add 0x1000 to the destination index.
    add di, 0x1000
     ; Set the word at the destination index to 0x4003.
    mov WORD [di], 0x4003
     ; Add 0x1000 to the destination index.
    add di, 0x1000

...and we dont need last add di, 0x1000

Actually you do for the next part.

Next, we need to set di to 0x4000, not add 0x4000 to current value: mov di,0x4000

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    ; Set the destination index to 0x4000.
    add di, 0x4000
 
    ; Set the B-register to 0x00000003.
    mov ebx, 0x00000003
 
    ; Set the C-register to 512.
    mov cx, 512

And this is the next part, where add di, 0x4000 should actually be gone.

Last note. We assume that ecx and edi (their high part) is zero, but it not always true.
mb use edi, ecx insted? (or zero them at begining)

Actually, I'm not even assuming that. The code I wrote in my tutorial is generally 16-bit code instead of 32-bit code. That means that rep stosb doesn't use ecx but cx, hence why I never bothered using the ecx register instead.

UPD
AMD64 APM vol. 2, page 357
"- Data-segment descriptors for software running in compatibility mode. The DS, ES, and SS
segments are ignored in 64-bit mode. See “Data-Segment Descriptors” on page 87 for more
information."

They are ignored and aren't ignored. The x86-64 architecture doesn't deal with "real" segmentation any longer, but the segment registers are still being used actually.


Regards,
Godlord.

[GDTR]

StephanVanSchaik, I want to help improve the article, nothing more.
Now it looks much more mature and helpful.

One more thing: you place PML4 on 0x1000 but seting cr3 to 0x4000 (this part not needed anymore)

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    ; Set the A-register to 0x00004000.
    mov eax, 0x00004000
 
    ; Set control register 3 to the A-register.
    mov cr3, eax

Igor

[StephanvanSchaik]

StephanVanSchaik, I want to help improve the article, nothing more.
Now it looks much more mature and helpful.

One more thing: you place PML4 on 0x1000 but seting cr3 to 0x4000 (this part not needed anymore)

Code: Select all

    ; Set the A-register to 0x00004000.
    mov eax, 0x00004000
 
    ; Set control register 3 to the A-register.
    mov cr3, eax

Igor

I've got no issues with that at all. My point was that you weren't asking questions, whilst you said you had a few questions.


Regards,
Stephan J.R. van Schaik.

[gerryg400]

They are ignored and aren't ignored. The x86-64 architecture doesn't deal with "real" segmentation any longer, but the segment registers are still being used actually.

No, in long mode the ds, es and ss are not used and are always ignored. You do not need to load them to execute in long mode. Because they are ignored you can leave the segment registers pointing at the 32bit segments that got you to long mode.

Of course you do need to load at least the DS while you are in protected mode on the way to long mode. And you will need to load them when switching to compatability mode to for example, run a 32bit process

- gerryg400

[StephanvanSchaik]

They are ignored and aren't ignored. The x86-64 architecture doesn't deal with "real" segmentation any longer, but the segment registers are still being used actually.

No, in long mode the ds, es and ss are not used and are always ignored.

They, the segment registers, aren't ignored, the only bit in the segment descriptor that is still used is the presence bit. Besides, if they were ignored then you wouldn't be able to get back to compatibility mode.

You do not need to load them to execute in long mode.

If you are referring to just the data segment registers, then yes, otherwise, I'll have to mention that the code segment register (and I said segment registers and not specifically data segment registers) is still being used. The full loading procedure of all the segment registers seems to be pro forma nowadays.

Because they are ignored you can leave the segment registers pointing at the 32bit segments that got you to long mode.

The code segment has to be reloaded eventually, as the DPL-entry isn't ignored, neither are some other flags in the segment descriptor the code segment register refers to.

Of course you do need to load at least the DS while you are in protected mode on the way to long mode. And you will need to load them when switching to compatibility mode to for example, run a 32bit process.

That means a processor can't just ignore them, as it has to check what flags are set whenever they are reloaded (e.g. to return to compatibility mode).


Regards,
Stephan J.R. van Schaik.

[gerryg400]

Stephan,
I think we actually agree. Perhaps we just differ in how we explain it. As the Intel and AMD manuals aren't exactly the same in how they explain it!

In the wiki article however, it is not so clear. There is a '64bit data descriptor' in the GDT and that might give the impression that it is needed or has some function. After all, most of the people who read your article will be coming from 32bit segmented world.

It may also be useful to add that the SS, if loaded, should only ever be loaded to point to the NULL descriptor.

In any event your article is an excellent tutorial.

What is your next wiki tutorial going to be about ??

- gerryg400

[StephanvanSchaik]

It may also be useful to add that the SS, if loaded, should only ever be loaded to point to the NULL descriptor.

The odd part though, is that one is able to make it point to a 64-bit long mode kernel data selector. Or at least I'm able to get that done using IRETQ. The only use of that however is that your GDT loading can be the same for both 32-bit and 64-bit and that the 64-bit variant is more pro forma.

In any event your article is an excellent tutorial.

Thanks.

What is your next wiki tutorial going to be about ??

Either the A20, the GDT (in 32-bit and 64-bit) or the IDT, but it's most-likely going to deal with the A20 as the next subject.


Regards,
Stephan J.R. van Schaik.

[TylerH]

A great addition, if you can find it, would be a post by Brendon showing how to enter long mode directly from real mode. He created a topic on it somewhere around here, I can't even remember which forum it was in though, and I suck at searching. Hopefully somebody around here bookmarks such useful things and will post a link.

[StephanvanSchaik]

A great addition, if you can find it, would be a post by Brendon showing how to enter long mode directly from real mode. He created a topic on it somewhere around here, I can't even remember which forum it was in though, and I suck at searching. Hopefully somebody around here bookmarks such useful things and will post a link.

It's basically the same (http://wiki.osdev.org/Entering_Long_Mode_Directly).


Regards,
Stephan J.R. van Schaik.